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ASubr1's avatar
ASubr1
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7 years ago

Qsys interconnect

I have a Nios II processor system with my own Qsys component which to monitor data memory access. The component has one slave (s1) (Nios data master is connected here) and one master (m1) (slave port...
Ahmed_H_Intel1's avatar
Ahmed_H_Intel1
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Can you share with us which errors been solved and which not?