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ASubr1's avatar
ASubr1
Icon for New Contributor rankNew Contributor
7 years ago

Qsys interconnect

I have a Nios II processor system with my own Qsys component which to monitor data memory access. The component has one slave (s1) (Nios data master is connected here) and one master (m1) (slave port...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

For your information, the new duplicated case seems to empty and the new AE is unable to view any details on it. To facilitate further discussion, I would like to seek your help to create a new case on the NIOs II intermittently feed extra address to on chip memory and let me know the case number so that I could help to route it accordingly. Sorry for the new inconvenience.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin