QSys doesn't properly create all output files during generation
I'm working with QSys (Quartus II, V13.0) on a NIOS II based design imported from SOPC builder. If I generate the output files for Quartus, not all required files seem to be properly build. (Simulation model: None, Testbench System: None, Synthesis: VHDL) 1. The system.h is missing (is there an option to turn it on and off?) 2. I have implemented my own QSys component (consisting of a hw.tcl and a .vhdl file) and I have added this component to my system. I can see that during generation, the vhdl file of my component is created in the Microcontroller/synthesis/submodules directory, but its size 0 bytes. Of course, Quartus complains about a missing implementation of my unit when trying to compile afterwards. If I copy the file manually after generation (that means that I replace the defective file by the original one) the compilation in Quartus works. Interestingly, this seems to happen only to QSys components that I have implemented myself. All other files that belong to the QSys output are ok. Any ideas?