I have rebuilt my project with the epcs module and to reset from epcs. I have rebuilt u-boot with the epcs features added.
While I wait for those epcs4 compatible parts to arrive, I noticed:
If the reset is set to epcs and there is no actual app code stored there, it locks on reset. I am wondering if the epcs bootloader is spinning in an endless loop, executing FF or what. I sort of expected the Nios to eventually find its way to 0x0 anyway where I have some code.
If I use nios2-download to bypass the epcs boot, I can run u-boot and test the epcs features. If I try an 'epcs info', I get an 'device not found'. I must do an 'epcs read' before 'epcs info' will work. There was mention of an epcs chip select issue. Does the latest psyent code have this issue?
The serial flash devices are getting larger all the time (8MByte!) and cheaper than parallel flash. I am thinking about storing multiple application images in the epcs. One way would be to boot u-boot and have it in turn load the select image from the epcs. This requires both u-boot and the app image to be sram resident at the same time - unclean. This is not the case with parallel flash since each image can have its own bootloader.
I think a better way would be to have the epcs bootloader get its image offset parameter from a new writable (system or epcs) register. That way POR would always boot image0 (u-boot), which could then clean boot any other image. Has this been done? I see some posted IP about an 'upgraded epcs' but no docs.