problems with pll output

Hi all ,

I am newbie for nios 2

I created a system using standard design available and some additional Pios of my own.

I am using one of the Pio to interrupt the nios 2 processor .

I am using Pll for my system. in which I have two output clocks . One that drives the whole system .

The other clock which is at a very low frequency is what I need for interrupting my system.

I connected this output to my design and the interrupting pio.

Now the problemis when I compile my system it gives me an error that pll output can be assigned only to an output pin. [http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif ]

I also need this clock to drive my design which I am testing.

Can anyone of you suggest a way of how to read this clock so that i can use it in my design.

waiting for a reply

thanks and regards

--abc