Forum Discussion
Altera_Forum
Honored Contributor
20 years agoProblems compiling VHDL
Hello, I'm using the NIOS II Development Kit on a Stratix II board equipped with an EP2S60 FPGA. I need to implement VHDL blocks for image processing. My block needs to read pixels wri...
Altera_Forum
Honored Contributor
20 years ago --- Quote Start --- originally posted by lord_redbeard@Apr 14 2006, 03:49 PM my block needs to read pixels written in memory (about max. 512*512 pixels).
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=14377)
--- quote end ---
--- Quote End --- What kind of memory are you using? And how fast do you want to read the data? If you have enough time, you could just split up the access into smaller intervals instead of getting everything at once.