Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

problem with Web Server

Hi,

i am a German Student and i have a University Project to implement a NicheStack TCP/IP on my 3c40 Board .

I used the "Web Srerver" example but when the program runs i have something Warrnings on it.

So what could be the Problem ? :confused:

The Problem is that the Program print me this:

WARNING : PHY[0.X] - Mapping of PHY to MAC failed! Make sure the PHY address is defined correctly in tse_mac_device[] structure, and number of PHYs connected is equivalent to number of channel

WARNING : MAC Group[0] - Number of PHY connected is not equal to the number of channel, Number of PHY : 2, Channel : 1

and at a while this:

DHCP timed out, going back to default IP address(es)

and i can't try to connect with them, when i put the default ip adress :

192.168.1.234 .

Pleas Help me, i've may back to the wall.

in the below you show the log file:

=============== Software License Reminder ================

This software project uses an unlicensed version of the NicheStack TCP/IP

Network Stack - Nios II Edition. If you want to ship resulting object

code in your product, you must purchase a license for this software from

Altera. For information go to:

=====================================================

InterNiche Portable TCP/IP, v3.1

Copyright 1996-2008 by InterNiche Technologies. All rights reserved.

prep_tse_mac 0

Your Ethernet MAC address is 22:22:22:22:22:22

prepped 1 interface, initializing...

[tse_mac_init]

INFO : TSE MAC 0 found at address 0x04006000

INFO : PHY National DP83849 found at PHY address 0x12 of MAC Group[0]

INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0]

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link...

INFO : PHY[0.0] - Auto-Negotiation PASSED

INFO : PHY National DP83849 found at PHY address 0x13 of MAC Group[0]

WARNING : PHY[0.X] - Mapping of PHY to MAC failed! Make sure the PHY address is defined correctly in tse_mac_device[] structure, and number of PHYs connected is equivalent to number of channel

WARNING : MAC Group[0] - Number of PHY connected is not equal to the number of channel, Number of PHY : 2, Channel : 1

INFO : PHY[0.0] - Checking link...

INFO : PHY[0.0] - Link established

INFO : PHY[0.0] - Speed = 100, Duplex = Full

TSEMAC SW reset bit never cleared!

OK, x=10002, CMD_CONFIG=0x00002000

MAC post-initialization: CMD_CONFIG=0x04000200

[tse_sgdma_read_init] RX descriptor chain desc (1 depth) created

mctest init called

IP address of et1 : 192.168.1.234

Created "Inet main" task (Prio: 2)

Created "clock tick" task (Prio: 3)

DHCP timed out, going back to default IP address(es)

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Which board is it? Are there really two PHYs? Are you using a reference design, or your own?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    this is a own project board from the University, i have two PHY's on the Board is an DP83849 to have an nEtwork connection and a HFJ12-2450E Socket.

    Yes i am using the Altera reference design, but i have deactivate all the flah functions, because i have no flash on this board and i make my own Mac adress wihout of function's.

    can you please help me ?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    How are the two PHY connected to the MAC? Do you have two Macs? Are their MDIO pins connected together?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Hello,

    i have make in The Quartus one TSE, and i connect one PHY to them my Phy chip have 2 PHY's once with channel A and B , on the circuit board is a DP83849 Dual Port Phyter.

    yeah the MDIO pin are connected. but how i can find out what is a Mac ?

    i don't now what is a Mac ? is this the Quartus implementation of the TSE ?

    edit:

    okay, i now what is a MAC, this is the Media Access Controller between FPGA and PHY.

    hmm... i have one of it because i brought only one.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    You actually have two kind of MACS: an external chip (that can also include the PHY) or an embedded MAC in a processor or FPGA. The TSE is a MAC that is integrated inside SOPC builder.

    You have two kind of interfaces between the MAC and the PHY: the MII interface that transmits and receives the actual data, and the MDIO interface that is a slower serial bus for setup, configuration and status report.

    In your application the driver is confused because it sees two PHYs through the MDIO interface but has only one MII interface. You could probably configure the MAC to have two network interfaces but I never tried that so I don't know how it would work out.