Problem with the new Nios II 1.1 release

Hello,

Ok I should clarify the behaviour in more detail. I have the following configuration for the external bus:

ext_io_bus (Avalon Tri-State Bridge)

- ext_cf (Interface to User Logic, CompactFlash)

- ext_flash (Flash Memory, CFI)

- ext_cpld (Interface to User Logic, CPLD registers)

- ext_dm9000 (DM9000 Interface, Ethernet)

In SOPC Builder all is like before updating to Nios II 1.1. Generating makes no problems and synthesizing too. But when trying to access the devices of the external bus by software they can’t be reached. That means that there is no or nonsense communication between the processor and the external devices. All others components (internal modules like JTAG-UART, I2C, …) seems to work correctly.

I didn’t check the signals with a Logic analyzer yet. I only want to know if someone has the same problems after the update. I tested the design with Quartus II 4.2 and Nios 1.0.1 and all was working fine. Perhaps there is a mistake in the design which was ignored when using Nios 1.0.1 and now it is coming up.

Bye,

niosIIuser