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Altera_Forum
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16 years ago

Problem with SDRAM on DE2 board

I am using the Altera DE2 board (Cyclone II FPGA), Quartus 8.0 and Nios II IDE 8.0. I am having trouble using SDRAM in my design. Following are the details: 1. I have included a PLL component ...
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Altera_Forum
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16 years ago

I found a description and solution to this problem in this document from Altera:

http://www.altera.com/literature/hb/nios2/n2cpu_nii51005.pdf

The problem, apparently is related to the tuning of the PLL phase shift. The document describes how to adjust the phase shift. Mine worked for a phase shift of -45 deg (-2.5 ns).