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Altera_Forum's avatar
Altera_Forum
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13 years ago

problem with mutex core

Dear all, I've created a qsys system composed of two NIOS, each one attached to its on-chip memory that contains its program. the two processors are connected to a shared RAM protected via a ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Are you sure that both CPU are connected to the same shared memory, that SHM is the correct address, and that this memory isn't used for anything else? (including the text, ro, rw, bss, stack and head sections)

I'd suggest to put SignalTap probes on the shared memory control signals to verify that the first CPU is correctly writing the value and see what the second one is reading.