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Altera_Forum
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15 years ago

Problem with Compiler Optimization

Hi, I am designing a Hardware Accelerator for IDCT which requires 17 inputs. I am writing into the 17 registers with the last register a control register which starts the hardware accelerator F...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi Dsl,

Checked the documents on data cache. Need to use IORD and IOWR instead of direct volatile declaration. Thanks for your suggestion :)