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Altera_Forum's avatar
Altera_Forum
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19 years ago

Problem with a pll

i have a new prototype of my own board with a 2c20-8 inside, at 49Mhz. testing the sdram, i found the pll lose cycles, and the clock signal to the sdram is erroneus (the high time is double than t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

The processor was running OK from internal M4K RAM, but crashed after some access cycles to the external SRAM. It was sometimes possible to access the external SRAM while running from the internal M4K RAM, but not for a long time.

We did not check all details, so we are not completely sure it was a power supply problem, but if decoupling is done very badly as in our case this may be the problem.

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