Problem using SDRAM

What I think fuji did, is shift the phase of the clock feeding the external memory.

Since there is a significant delay going off-chip to fetch data, and the memory is supposed to be synchronous with your processor, the clock-skew because of this delay is affecting the behavior.

The clock therefore has to be phase shifted to compensate for this delay. For an example on how this is done, see altera documentation (http://www.altera.com/education/univ/materials/manual/labs/tut_de2_sdram_verilog.pdf)

Since you are using a custom board, you will have to somehow figure out what the number (-3 ns in the above document) is for your board.

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originally posted by raghuraman@Oct 24 2005, 04:06 AM

hello!

i have a very similar problem, my code is not running from my external ram (ssram) and i am using a custom board. i cud not follow how u solved the problem, can u please explain what i should do to get it working.

my opcode fetches are happening fine, but the stack pointer (fp) is pointing to an absurd address location.

thanks in advance,

raghu

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