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Altera_Forum
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12 years ago

Problem Running Nios II Design Standalone

Normally I use HDL for everything, but I’m trying to move into soft processor and SoC design. I created a Quartus/Qsys project to run the Nios II Binary Count example code project on a DE0-Nano devel...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Thank you for the reply. I tried removing the JTAG UART from the Qsys system (un-checking the use box) just now. Unfortunately, that broke the Eclipse project. It is no longer able to create a BSP due to errors related to the JTAG UART. I don't know how to hack up the Count Binary project to remove the need for the JTAG UART, so I will look into disabling the overflow response as you mentioned. It's too bad there's no check box for that in the peripheral in Qsys.