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Altera_Forum
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12 years ago

Problem Running Nios II Design Standalone

Normally I use HDL for everything, but I’m trying to move into soft processor and SoC design. I created a Quartus/Qsys project to run the Nios II Binary Count example code project on a DE0-Nano devel...
Altera_Forum's avatar
Altera_Forum
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12 years ago

The issue is likely the JTAG UART. I've never used it, but I'm pretty sure I recall that if there is no-one reading from it, its FIFOs fill up, and that likely causes the NIOS II writes to the (full) FIFO to block indefinitely.

Search based on the JTAG UART, and you'll likely find recommendations for disabling it, or at least disabling the FIFO over-flow response, or simply remove it from your Qsys system, and try that.

Cheers,

Dave