ok,I am success!
now I have run uClinux successfully on niosII (cyclone board)and configure my IP address on it.uClinux/Nios II
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Altera Nios II support © 2004 Microtronix Datacom Ltd.
On node 0 totalpages: 4096
DMA zone: 0 pages, LIFO batch:1
Normal zone: 4096 pages, LIFO batch:1
HighMem zone: 0 pages, LIFO batch:1
Built 1 zonelists
Kernel command line: root=/dev/mtdblock0 ro
PID hash table entries: 16 (order 4: 128 bytes)
Memory available: 14596k/4096k RAM, 0k/0k ROM (1298k kernel code, 285k d
Calibrating delay loop... 24.62 BogoMIPS
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
POSIX conformance testing by UNIFIX
NET: Registered protocol family 16
Serial: JTAG UART driver $Revision: 1.3 $
ttyJ0 at MMIO 0x80920820 (irq = 1) is a jtag_uart
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
smc_probe: 50000 Khz Nios
SMSC LAN91C111 Driver (v2.1), (Linux Kernel 2.6)
eth0: SMC91C11xFD(rev:1) at 0x80910300 IRQ:6 MEMSIZE:8192b NOWAIT:0 ADDR
ed:0b:0c:6c
smc_probe: 50000 Khz Nios
Using anticipatory io scheduler
microtronix[mtd]: RAM probe address=0x200000 size=0x1ee000
Creating 1 MTD partitions on "RAM":
0x00000000-0x001ee000 : "ROMfs"
microtronix[mtd]: set ROMfs to be root filesystem
NET: Registered protocol family 2
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 1024 bind 2048)
NET: Registered protocol family 1
NET: Registered protocol family 17
VFS: Mounted root (romfs filesystem) readonly.
Freeing unused kernel memory: 44k freed (0x1172000 - 0x117c000)
expand: from=/ramfs.img to=/dev/ram0
expand: from=/ramfs.img to=/dev/ram1
/etc/issue
www.microtronix.com July 2004
Welcome to Linux on the Nios II
Nios2 login: nios
Password:
Login incorrect
/etc/issue
www.microtronix.com July 2004
Welcome to Linux on the Nios II
Nios2 login: nios
Password:
# ls
ftp httpd# ifconfig eth0 211.65.88.227 netmask 255.255.255.128
eth0:PHY 100BaseT
eth0:PHY Half Duplex#