Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThe same as all the other sopc block pins.
When you instantiate the sopc in the top level (HDL or schematic) you assign names to the wires connecting the sopc block I/Os to the top level I/Os (i.e. the fpga pins). If you never compiled the design you must manually insert this names in pin planner. If you compile once, then you'll find the pin names already there and you only need to assign them to the required location.