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Altera_Forum
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21 years ago

Problem debugging on a custom cyclone board

Hi: This is just about getting us crazy. We have designed a custom board with a Cyclone chip for implementing a NIOS II processor, both the processor and the SDRAM seem to work ok (some impleme...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

After all of this headache, It's working!!!

Thanks a lot Soin for your help!!

The cause was the SDRAM PLL phase delay. Once set up to the value you said it all started to work.

Thanks again.