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Altera_Forum
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20 years ago

Problem debugging on a custom cyclone board

Hi: This is just about getting us crazy. We have designed a custom board with a Cyclone chip for implementing a NIOS II processor, both the processor and the SDRAM seem to work ok (some impleme...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

The clock frequency we are using is 50MHz, with phase shift of -72deg for the SDRAM clock.

I've now recompiled without the Legacy SDK support to see....BUT SAME RESULTS!!!!!