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Altera_Forum's avatar
Altera_Forum
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16 years ago

Problem about the Pin planner of SOPC core

I bulid a system with SOPC builder. And I only use six components ,CPU ,JtAG Uart ,system id, Pio*3 and pll. The PIO that two is 16 bits output signal, the other one is 1 bit output signal. t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

In the schematic you posted, I see that g output pin seems to be connected to a bus wire. Is there a mistake or is it simply a problem with the bitmap image?

Anyway, please, explain better your problem.

Which device works and which doesn't?

The problem is with pin assignment or with pio interface with the pwm_hall module?