Altera_Forum
Honored Contributor
14 years agoPrinting 32bit signed 2s complement data via JTAG UART
I'm trying to print out samples generated by the WM8731 audio codec on the DE2 board via the JTAG UART in a Nios II system. The samples are deserialized in Verilog HDL, squared (this is needed for a different module but it is the part that's not working) then transferred to the Nios system to be printed on the PC terminal. The C program to print out the data is:
# define USB_Ctrl (volatile char *) 0x00005000
# define Data_in_1 (volatile char *) 0x00005010
# define Data_in_2 (volatile char *) 0x00005020
# define Data_in_3 (volatile char *) 0x00005030
# define Data_in_4 (volatile char *) 0x00005040
int main()
{
alt_32 data_1;
alt_32 data_2;
alt_32 data_3;
alt_32 data_4;
int sw = 0;
while(1)
{
// Get data from FPGA system
sw = *USB_Ctrl;
data_1 = *Data_in_1;
data_2 = *Data_in_2;
data_3 = *Data_in_3;
data_4 = *Data_in_4;
// Only print out data if SW is HIGH
if(sw)
{
printf("audR: %d \t audL: %d\t audL2: %d\t\t filt: %d\n", data_1, data_2, data_3, data_4);
//printf("%d\n", data_1);
}
}
return 0;
}
The only way I've been able to get it to properly print out negative numbers is to use volatile char * but char is only 8 bits and I need 32 bits. And then when audL is squared to get audL2, the results are always wrong for anything above 11 for some reason (ie it will properly square anything from +/- 0 to 11 but nothing else). Changing this to alt_32 doesn't print out the negative values (ie it will print 65534 instead of -2). What am I doing wrong?