Forum Discussion
Altera_Forum
Honored Contributor
20 years agoYes. I had posted the same wrt U-Boot.
It is a custom board with Nios II, Intel strata flash and Samsung SDRAM and few more components. Off chip SDRAM is connected to Nios directly through Avalon switch fabric and no tristate bridge is used in between. While configuring SDRAM controller in SOPC since samsung memory is available in dropdown list of the controller wizard the SDRAM controller is generated for custom memory. We are using SDRAM controller and Avalon switch fabric from SOPC builder. Here is what exactly happens: Assume I am trying to write 'a' at 0x0 using a char *. It puts 'a' at 0x0. When I put 'b' at 0x1, It moves 'a' from 0x0 to 0x1 and puts 'b' at 0x0. I have tested It with Nios II IDE's sample programs, I get the same result. I could even port linux kernel to the board, but got the same result. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/unsure.gif