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Altera_Forum
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21 years ago

power failure interrupt on NIOS 2

HI, I am busy with a design of an embedded system with Altera Cyclones with NIOS 2 and a LPC2106 ARM cpu. Have implemented RTC with battery backup, nonvolatile 32kB sram (simtek), a LT...
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Altera_Forum
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21 years ago

Ron,

I was playing with the SOPC builder when I remembered that you can have the PIO generate an IRQ. I instansiated one line as an input only and enabled the gen irq + edge triggered irq (input options). Looks like it works, but I don't think there is an equivalent NMI.

Anyone: since the documents state that the IRQs priorities are software controlled, do the IRQ numbers mean anything in the SOPC builder? In another words does IRQ0 have a higher hardware priority than IRQ5?

Rick