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Honored Contributor
Honored ContributorPosible Problem with ISR Edge PIO
Hello, This is more a theoretical view, but think it could be important to you. When working with an IRQ generating PIO with Edge Capture Register and multiple inputs, a ISR proccesing rou...
Altera_ForumHonored Contributor
Honored ContributorIt can be a much longer time between the two instructions : suppose you are running from SDRAM --> when the SDRAM controller decides to insert a refresh cycle just between the fetch of the two instructions, ....
The only easy way to solve this kind of issues is to reset the register in hardware automatically during the read operation. You must hower have a single clock read operation for that. That is the way I do it most of the time.
