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Altera_Forum
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15 years ago

Porting PIO C-code from ARM-7 to Nios II (SE1-board) + performance issue.

Hi all, I'm having a try at the moment to port my C-code from the arm-7 mcu, LPC-P2148 to Nios II, SE1-board , Cyclon-II, EP2C20F484C7. The arm-none-eabi-gcc compiler was used for the ARM-7 ...
Altera_Forum's avatar
Altera_Forum
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15 years ago

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IMHO a cache does not significantly improve the NIOS II/e performance.

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Run a real program with instruction/data caches on and off and see for yourself that it makes a substantial difference. I tried to turn off caches (code and data) in 3 combinations to free up onchip RAM and the resulting speed was unusable for us.

Bill A