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Altera_Forum
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15 years ago

Porting PIO C-code from ARM-7 to Nios II (SE1-board) + performance issue.

Hi all, I'm having a try at the moment to port my C-code from the arm-7 mcu, LPC-P2148 to Nios II, SE1-board , Cyclon-II, EP2C20F484C7. The arm-none-eabi-gcc compiler was used for the ARM-7 ...
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Altera_Forum
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15 years ago

Why not adding a cache between NiosII-e and the external memory ?

Reinhard, your NiosII-e runs @ 50MHZ as well as your SDRam.

By placing a cache between NiosII-e and SDRam this could speed up your execution.

Such a cache (with wishbone interface) is used by the zet project and available as verilog soure. maybe it is time to write a wrapper around it that it acts as a slave to NiosII but and as a Master to SDramIP Controller ...

This verilog source can be parametrized in deep and size