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Altera_Forum's avatar
Altera_Forum
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21 years ago

Poor performance with LWIP and uCOSII on NIOSII

Hi there,

I'm using a niosii system using data (2kb) and instruction cache (4kb) and running ucosii and lwip, and based on an ip gbethernet mac core.

With a very simple (and stupid ...) application, I benchmark the overall performance of this system with a UDP streaming.

The first results concern me a lot:

globally the low level (Interrupt handler, home made driver and VHDL IP core) runs quite well :

interrupt latency => 7usec

delay in the interrupt delay in (Transmission mode) => 6usec

DMA transfert => 10,6usec (for 1024 bytes)

however, even with a simple loop at the application level to send a given number of udp packets (no superfluous job), the first results give me a maximum throughput about 5-6 mbits/sec which is very low.

Does someone have any figure to confirm or to invalidate my results with an equivalent system ?

Thanks in advance.

Gaël

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Your figures are in line with what I would expect, what's your target?

    If you look at the topic "lwip MicroC/OS-II throughput" in the MicroC/OS-II Forum you will see that 17MBits/s UDP Rx and 35MBits/s UDP Tx have been achieved.
  • Altera_Forum's avatar
    Altera_Forum
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    What do you mean by target ? I'm using a Stratix 2S60 on altera evaluation board.

    Do you have an idea about the system configuration used to achieve 17Mbits Rx and 35Mbits tx ?

    Was it on the altera evaluation board using a standard design ?

    Gaël
  • Altera_Forum's avatar
    Altera_Forum
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    Sorry I meant what's your target performance?

    As for the information on the system, all I know is what's in the posting I referred you to.