Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

Polling & INTs with NIOS II

Hi, I have 2 cascaded processors with a shared memory. The first processor writes its data in the shared memory and when it finishes, the second processor must be notified that the data is availab...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

Hi Acer,

One method would be to put a 2-bit PIO on each CPU. One bit is output and other bit is input with interrupt capability. Connect the o/p of one PIO to the input of the other (and vice versa). After writing data to the shared RAM the CPU can then write to it's PIO to generate an interrupt on the other CPU.

Banx.