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Altera_Forum's avatar
Altera_Forum
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13 years ago

Please suggest on implementation of signal processing

I want to implement a signal processing scheme on DE0 board (cyclone III) in which,

1] read data stored on SD card

2] apply mathematical operations on read data (polynomial)

3] save the final O/P on a different location in SD card or internal storage in FPGA

please suggest me how to implement this and what to read/study before going for implementation or any other suggestions of any kind are welcome.

NOTE : reg, point no. 1 & 3 above, is it possible to read/write as a text file (*.txt, *.csv etc)? I mean like how we load data files in SCILAB or MATLAb etc.

thanks

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    How's the data stored on the sd? is there a file system? there's some nice free fat libraries for C if you are willing to add a nios. I think altera also provides some file system support in their hal api

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    the data on SD card is supposed to be present in a file, as sequences of 0s and 1s like ;

    010010010010101001010011

    100110010100000101010010

    100101001010010100101001

    .......

    ....

    I read many articles/tutorials about accesing of SD card using NIOS, but still I feel difficulty in reading back these bits......

    Also, my doubt is whether these bit sequences can be putted in a file with extension as *.txt or *.csv ??
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    So it's raw data then? If you can wire the sd to use SPI mode the logic should be pretty easy to write to communicate using SPI. There might be some free SPI cores available too.

    file extensions are meaningless without a file system
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Since you want to store the math results into another file on the SDCARD (to be opened on your PC right?) using file system on SDCARD makes things much much simpler.

    You can use FATFS [http://elm-chan.org/fsw/ff/00index_e.html] which is free & can work with FAT,FAT32 mounts. Porting this to NIOS needs some work, but very do-able.

    As for the hardware, a NIOS II processor, SPI core, 1us timer & memory should be enough. All these are available in the Qsys peripheral library for free.

    Like jderrick said, Altera HAL has some built in support for FAT file systems. This link would be helpful:

    ftp://ftp.altera.com/up/pub/altera_material/11.0/university_program_ip_cores/memory/sd_card_interface_for_sopc_builder.pdf