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Honored Contributor
Honored ContributorPIO Interruptions
Hello, I made a simple program with an ISR, and when I unmask the most periodic interruptions, they aren't seen by my program. I have a simple question, anyone knows what is the maximum freq...
Altera_ForumHonored Contributor
Honored ContributorOn most processors, Nios II included, the frequency at which you can see every interruptable event separately depends on many factors, including system load, which other interrupts are occurring at the same time and whether the foreground has disabled interrupts (for example because its claiming or releasing a semaphore).
Where possible, you should design your hardware interface so it can cope if the software does not handle an interrupt before the next one occurs. In many cases you can get higher performance by deliberately merging together events and interrupting only on the last one. Please remember that an interrupt is just a signal to the processor that it needs to do something, not an order to carry out processing. Having said all that, my "rule of thumb" is that interrupts usually stay distinct below about 100us.
