PIO cores

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originally posted by mendonca@May 12 2006, 10:35 PM

i'm using pio once my application demands high degree of parallelism. when i use a shared memory the processors "suffer" with the conflict in access it. the use of extern memories, as ddr sdram, to store stack, heap, data and instructions also presents a obstacle to my goals, my implementation is big enough so that it doesn't fit totally on-chip. i'm trying to minimize this problem.

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Sorry bu I did not understand... I think passing data through PIO will be much more heavyweight than using a -little- shared memory... but if you are happy like that :-)

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originally posted by mendonca@May 12 2006, 10:35 PM

but thank you too much, paolo. if the use of pios cores "among" processors didn&#39;t damage your board i think i&#39;m safe to try my experiments. if you (or somebody else) have some suggestions about resources offered by nios which can help me to improve the parallelism among my processors, they will be welcome.

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As long as I know, there is the Multiprocessor tutorial from Altera available on the Altera web site, as well as a 2CPU example for the 1s40 evaluation board at the evidence literature page for nios ii (http://www.evidence.eu.com/nios2)

bye

Paolo