PIO cores

Paolo,

I'm using PIO once my application demands high degree of parallelism. When I use a shared memory the processors "suffer" with the conflict in access it. The use of extern memories, as DDR SDRAM, to store stack, heap, data and instructions also presents a obstacle to my goals, my implementation is big enough so that it doesn't fit totally on-chip. I'm trying to minimize this problem.

But thank you too much, Paolo. If the use of PIOs cores "among" processors didn't damage your board I think I'm safe to try my experiments. If you (or somebody else) have some suggestions about resources offered by Nios which can help me to improve the parallelism among my processors, they will be welcome.

Regards,

mendonca.