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Altera_Forum
Honored Contributor
Honored ContributorPerformance Counter
I want to measure a time count taken for a section of a code. But the output i'm getting is always zero. I'm viewing my output through IDE output console. I have patched my code and the ou...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- originally posted by sanchu@Mar 15 2005, 06:23 AM found a workaround for this problem:
it seems to work fine if i take the verilog project from standard folder under \kits\nios2\examples\verilog\niosii_stratix_1s10\standard and add performance counter to it.
if i take vhdl project from standard folder under \kits\nios2\examples\vhdl\niosii_stratix_1s10\standard then, it is not working fine. --- Quote End --- I'm having the same problem... does anyone got it running using VHDL? Paolo
