PCIe "Enumeration" SW on NIOS II ?

OK, my design has a NIOS II based SOC and a PCIe Altera IP in the top-level. The NIOS II and all peripherals run on 100Mhz but interface via MM-FIFOs at 50Mhz to the PCIe IP. I have a simple utility programs that sends config. packets to the PCIe IP and it replies correctly with device ID, etc. The card is plugged in a system slot on the bus AND it provides the PCIe clock to the bus. I took over the design from someone else... so I am not sure really what differentiate a RootPort from an EndPoint other than who provides the 100Mhz clock. I did not know that an EndPoint can do enumeration.