Hi Hippo, Hi Bigboss
Thanx for your answers...
i have now logged the PCI Bus DATA-READ (BE = 0x06h).
Here is a plot from the SignalTap trace: trace-picture (
http://www.mabcom.de/pci.jpg)
Maybe something wrong? My Software gives a 0x32bfffff when read from Adress 0x200000. In the Signaltap you see another value. Why?
Any ideas? What about the PCI clk? I have clocked the Signaltap Analyser with PCI_CLK. I generate a 33MHz CLK and give it to CLK_PCI_COMPILER input clk and also the same clock to the Hardware PCI_CLK_Pin. I have also added Phase-Shifting, but that doesn't work.
I hope you can help me
http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif
Bye
Marco