Altera_ForumHonored Contributor21 years agoPausing target processor : not responding Hi all !. I m stucked withe the following problem : My system is built with a NIOS II, JTAG UART, one AM29LV065D flash, and 2 IDT71V416S RAM. I am using Quartus 4.2 SP1, IDE 1.1. When I try ...Show More
Altera_ForumHonored Contributor21 years agoI soldered on the board a 5K resistor pull up to the 3.3V on both Flash and RAM.
Recent DiscussionsFPGA Community EnqueriesLPDDR4 not available in NIOSV/g linker script - Agilex-5, Quartus 26.1 ProMultiple NIOS V ImplementationSolvednot able to use multiple niosV cores at the same timeNios V/m JTAG run‑control HALT fails — Debug Module healthy, hart never halts