ow to define an uncached linker region

If you haven't enabled the MMU, then a31 acts as a 'cache bypass' when accessing Avalon MM addresses rather than as an address line. You may need to ensure the bit is masked if other Avalon masters use the addresses.

Another way is to use the ldio/stio instructions (which is what the IORD macros do).

The third way is to remove the data cache entirely and put all your data (including the rodata sections) into tightly coupled data areas. This is only really an option for small systems though.