Open Cores MAC with a Nios II processor

Hi,

I am trying to set up a web server using Nios Development Board 1 running APEX20K200EFC484-2X soft-core processor. I have donwloaded the OpenCores Ethernet MAC core from MACO Engineering.

I would like to built by own a Ethernet PHY module using National Semiconductor's DP83865 PHY. I got the schematic for the module DBGIG1 which supports Altera Cyclone and Stratix. But I am not sure whether it is also compatible with Altera Apex20KE.

Anyone can provide me schematics of suitable Ethernet PHY circuit and if possible the reference designs in Quartus BDF file? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

Also, I tried using the OpenCores Ethernet MAC Cores in SOPC Builder and when I generate it, the compilation fails when it comes to compilling the igor.c file in the lib folder. It has incompatible declarations with igor.h such as :

In igor.h, we have "

int nr_igor_reset(void *hardware_base_address, ns_plugs_adapter_storage *adapter_storage, ns_plugs_network_settings *s);

"

But in igor.c , they use ---------

int nr_igor_reset(r32 hardware_base_address, ns_plugs_adapter_storage *adapter_storage, ns_plugs_network_settings *s)

{

r32 e = hardware_base_address;

Instead of void *, it uses r32 ( an undefined type).

then I included in the igor.h , the following:

typedef unsigned char r8;

typedef unsigned short r16;

typedef void r32;

But i noticed that there are some functions in igor.c which has type int for hardware_base_address, such as:

int nr_mii_dump_registers(r32 hardware_base_address, ns_plugs_adapter_storage *adapter_storage)

{

int e = hardware_base_address;

How should I solve this problem?Please , anyone, please enlighten me.

Thank you very much,

Yours sincerely,

Makoto

Thank you very much