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Altera_Forum
Honored Contributor
Honored Contributoronchip memory granularity
Is there something in Quartus/SOPC/NIOSII that forces M4K allocation for on-chip memory to be a power of 2? If so is there a workaround or is this something basic like the hardware always allocates ...
Altera_ForumHonored Contributor
Honored ContributorI did not notice the max-depth last week (sorry for not reading carrefully).
My design used up all the m4k blocks accept for the last 5. By changing the max depth parameter in the VHDL two extra m4ks were added to my codesegment (victory!) but the last three I could not access (floor plan shows the tangling blocks). A few hours of experimenting with these settings (that are not very clear to me) did not add new m4ks to code or data segments. Enlarging the num_words values by one m4k block causes the fitter to complain. But still, 2 extra blocks already helps. Thanks for the input.
