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Altera_Forum's avatar
Altera_Forum
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21 years ago

onchip memory granularity

Is there something in Quartus/SOPC/NIOSII that forces M4K allocation for on-chip memory to be a power of 2? If so is there a workaround or is this something basic like the hardware always allocates ...
Altera_Forum's avatar
Altera_Forum
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21 years ago

The problem you described is indeed very inconvenient. SOPC does not support full utilisation of the memory resources. By editing the generated vhdl files you can maximize your code or data memory.

I have been doing this many times. Every rebuild needs manual adjustments. By choosing a code or data block bigger than you actually needs (2^x) SOPC generates the correct address lines and control signals. After code generation just downsize the number of words (not forgetting these fields in the comment lines, these are reads by the tools as well). Now synthesize the design.

Still I can not gain full utilisation of the M4Ks with one data and one code segment.