OnChip memory access with external logic

Thanks,

i want to expose the memory ports, not the avalon slave - this i've done.

in order to benefit a full BW usage of the memory.

now i am using an simple avalon master, which utilize only half (even less) BW.

i've defined new component with avalon master and export its signal. i didn't find the way to do so with pipeline master (only as bridge).

i will try Qsys, i used SOPC.