OnChip memory access with external logic

Using Qsys you would be able to export one of the slave ports of the on-chip memory. That said the logic to create a direct connection is practically the same as creating an Avalon master so if it was me I would just build the master just in case you want more stuff to connect to the same memory which you can't do easily building up a direct connection.

Like DSL said be sure to include the readdatavalid signal as well so that you can post back to back reads to the memory. You'll still want to throttle read/write access using the waitrequest signal, if your master is the only thing connected to the memory port and you make it a pipelined master then the waitrequest should never go active.