OnChip Memory - Addressing problem

Hi Matteo,

I am mistaken! I just talked with some of our Avalon/SOPC Builder team and this is legal; this indicates a bug. I want to let you know that I just tried to generate in SOPC Builder + Build software for a similar system (two CPUs, each with a memory at the same address that is not shared), and this was successful; I am using the next release of Quartus/SOPC Builder/Nios II which is due to be completed in the coming weeks.

As a workaround, could you just define each peripheral with a separate address space and proceed from there?

...Just a note about your comment from AN 184 (I wrote that app note http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif This statement is absolutely true regardless of what the addresses for the slaves are. Envision the address you assign in SOPC Builder as just defining what does into an address decoder to generate a chip select for each of the slave peripherals; if you have one master asking for address x and another for address y, the arbitration logic (muxing) creates a path between each master to each slave simultaneously.... just to prove it, if you ever take a look at the Avalon logic that SOPC Builder generates you can see this by tracing data from slaves up to masters (although this can be a tedious process)... so following the workaround above, you do not lose any performance in your system, you just have a different pointer in your C code...