Forum Discussion
Altera_Forum
Honored Contributor
21 years agoFrom one of the engineers...
I hope this helps. 1. we have to ask the ISS person about the ISS error. that isn't covered here. 2... here it is. This is a matter of setting up his project correctly. Set the reset address as the EPCS device. But -- he does not want the EPCS to be his "target memory" (the area that gcc compiles his elf for. System library -> Properties -> System Library -> Linker Script). He wants that to be set to a volatile memory like SDRAM or on-chip RAM or something. When the reset address is the EPCS device, the incredibly-clever IDE will produce both an elf that's targeted towards the volatile memory (RAM), and a .flash file for the EPCS that contains both a bootloader and the elf. In normal in-the-field operation, the CPU will reset to the EPCS device. Upon reset, the bootloader code in the EPCS device will copy the elf file from the EPCS into whatever memory that elf is compiled for, then the CPU will jump to that memory and run the elf as normal. While debugging/running from the IDE, the IDE will not bother with the .flash file for the EPCS at all. It directly loads the elf file into volatile memory, sets the PC to _start, and runs user code from there. The reset address does not play into what PC the CPU begins at while debugging.