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Altera_Forum's avatar
Altera_Forum
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15 years ago

Nois CPU halt at fprintf

hi,everyone:

I have to output information by UART in my project, When program loaded from FLASH(EPCS),then CPU halt at fprintf(),so do with getc(),fscanf(),but not fwrite(). but it is ok in debug mode with JTAG-UART. Why?

Who can help me,thanks!

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    code as following:

    int main()

    {

    FILE *fp;

    char echo;

    fp = fopen(UART_0_NAME, "r+");

    if (fp)

    {

    while (1)

    {

    echo = getc(fp);

    fwrite(&echo, 1, 1, fp);

    fprintf(fp, ">>\r\n"); // always stop here

    }

    }

    return 0;

    }
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Well, the stdio functions will probably be buffering the output data until \n is output - so nothing will try to access the uart itself until then.

    That probably means your uart either isn't configured properly (so the io cycles to it are stalling the cpu), or any interrupt service routine is misbehaving (looping or not clearing the IRQ line).
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    What is the difference between using jtag debug and software run from flash? It confuses me.

    Everything is ok when debug it, but it don't work when boot from flash.

    Why?God,help me,please!
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Typically, when it's "running" from flash, it's really copying code from flash into RAM and then executing that code.

    How do you know that your code stops at fprintf() when loading from EPCS/flash? Have you run a minimal memtest (with a simple DMA in your system) on the memory you're loading to? What is your offchip memory?

    Regards,

    slacker
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    i solved it finally！it is so easy when i got it.

    Only set "Exception Vecoter" in CPU seting to SDRAM not EPCS_FLASH_CONTROLLER in SOPC Builder.

    If exception vector be pointed to epcs_flash_controller, then interrupt of fprintf() happened, it can't jump to the correct location.

    Thanks to normad, dsl and slacker.