Forum Discussion
No Nios II target connection
Hi,
Before "run as hardware" you should configure the fpga with the .sof file generated
If you get a popup saying "no Nios II target connection paths were located", go under the Target connection tab, click refresh connections.
Have you download the correct .sof ?
Have you selected correct sopcinfo file while creating the eclipse project?
Check pin assignments of clk and reset?
Regards
Anand
Hi,
Yes, the correct .sof file is downloaded to the FPGA and runs.
Yes, it is the correct sopcinfo file.
Clk (100Mhz) and Reset (high active) are correctly connected and are working.
The Target connection tab shows no target even after multiple refreshes.
I've set the following clock constraints:
create_clock -name {CLK_100MHz} -period 10.000 -waveform { 0.000 5.000 } [get_ports {CLK_100MHz}]
derive_pll_clocks
create_clock -period "30.303 ns" -name {altera_reserved_tck} {altera_reserved_tck}The altera_reserved_tck constraint is based on this Knowledge Base article.