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Altera_Forum
Honored Contributor
12 years agoNo network activity
I'm writing an application in uc/osII which uses the iniche stack for network communications. My application runs successfully on the Altera provided sss example, however, once transferring to a new ...
Altera_Forum
Honored Contributor
12 years agoHow is the TSE connected to the PHY chip in the new design?
It seems that the PHY is synchronizing at 100Mbps and not gigabit. Was it the same on the first design? Did you connect the clocks accordingly, and at the right frequencies? The next step to debug the problem is to put some signaltap probes on the RGMII interface and see what is happening there.