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originally posted by eliben@Sep 6 2006, 06:05 AM
how can i reset my processor from inside the vhdl code without it resetting all peripherals ?
i have a top entity vhdl which has an instance of the nios ii system (which was generated by sopc builder), connected to various custom vhdl modules. i want the vhdl to supervise processor operation and restart it in case anything goes wrong. how can this be achieved ?
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I think Nios V6.0 provides a separate CPU reset signal...
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