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Altera_Forum
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16 years ago

NiosII is slow? Or something I am doing wrong.

Hi all, I am playing with Cyclone II chip. It is custom board and there is ATMEGA16 running at 12MHz and FPGA with master clock 50MHz. FPGA is translating data from internal dualport memory ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Is you app being compiled with -O2 as well as the BSP/libc bits?

I gave up looking for the relevant config option and hacked the makefile.