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Altera_Forum
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15 years ago

NIOSII addressing for 32 bit wide SDRAM

Hello, first time poster here. As the title suggests, I have an FPGA accessing a 32 bit wide DDR2 device (actually 2x 16 bit devices with appropriately shared signals). Using SOPC builde...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thinking out loud here but assuming there is an issue with the system SOPC

is generating then I wonder if increasing the column address width by 1 would help.

Then access as 8x and my span would be twice so I could see all the memory.

Downside would be that more SOPC span is lost but that would be ok.

??